ChipBench
Benchmarks
| Task Name | Dataset Name | SOTA Result | Trend | |
|---|---|---|---|---|
| Verilog generation | ChipBench-SC | Pass@136.7 | 14 | |
| Python reference-model generation | ChipBench-SC | Pass@143.3 | 10 |
Showing 2 of 2 rows
| Task Name | Dataset Name | SOTA Result | Trend | |
|---|---|---|---|---|
| Verilog generation | ChipBench-SC | Pass@136.7 | 14 | |
| Python reference-model generation | ChipBench-SC | Pass@143.3 | 10 |