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Verilog Code Generation on RTLLM v2

75.8Pass@1

ChipMATE-Agents-9B

31.91243.30654.766.094Nov 25, 2025Dec 23, 2025Jan 20, 2026Feb 17, 2026Mar 17, 2026Apr 14, 2026May 13, 2026
Updated 20d ago

Evaluation Results

MethodLinks
2026.05
75.877.3-
2026.05
74.677.3-
2026.05
71.975.8-
2025.11
6878.281.7
2026.05
6878.2-
2026.05
6874.6-
2026.05
64.868-
2025.11
64.775.879.7
2026.05
64.775.8-
2025.11
63.870.673.9
2026.05
63.268-
2025.11
59.171.573.3
2026.05
58.866-
2026.05
57.670-
2025.11
57.271.977.1
2026.05
57.271.9-
2025.11
56.570.375.2
2026.05
56.570.3-
2025.11
52.368.673.4
2025.11
50.960.964
2025.11
47.863.967.8
2025.11
41.853.960.3
2025.11
4160.168.1
2025.11
36.152.457.6
2026.05
36.157.8-
2026.05
34.349.7-
2025.11
33.645.349.2