RTL Design Generation on RTLLM v2.0
0.07Delay (ns)
ChipSeek-R1
Updated 1mo ago
Evaluation Results
| Method | Links | ||||
|---|---|---|---|---|---|
2026.03 | 0.07 | 93.632 | 0 | - | |
2026.03 | 0.294 | 109 | 0 | - | |
2026.03 | 0.329 | 112 | 0 | - | |
2026.03 | 0.362 | 122 | 0 | - | |
2026.03 | 0.417 | 142 | 0 | - | |
2026.03 | 0.46 | 210.672 | 0 | - | |
2026.03 | 0.47 | 150.822 | 0 | - | |
2026.03 | 0.49 | 143.64 | 0 | - | |
2026.03 | 0.53 | 212.002 | 0 | - | |
2026.03 | 0.57 | 97.888 | 0 | - | |
2026.03 | 0.57 | 97.888 | 0 | - | |
2026.03 | 0.84 | 89.376 | 0.0001 | - | |
2026.03 | 1.49 | 1,202.852 | 0 | - | |
2026.03 | 1.75 | 1,286.908 | 0.0004 | - | |
2026.03 | 1.92 | 1,573.39 | 0.0008 | - | |
2026.03 | - | - | - | 1 | |
2026.03 | - | - | - | 2.196 | |
2026.03 | - | - | - | 5.119 | |
2026.03 | - | - | - | 8.539 |